Engineering Faculty Timetabling System

Automated unified timetable generation using CP-SAT optimization for Computer Engineering courses.

Generate conflict-free timetables with optimal scheduling for lectures and labs.

Generate Unified Timetable
2
Total Timetables
13
Courses
16
Instructors
2
Lab Types
Recent Timetables
Name Year Semester Created Status Actions
Spring Semester - All Years All Years Spring Jan 26, 2026 Active View Grid
availability test - All Years All Years Spring Jan 25, 2026 Active View Grid
Quick Actions
Generate Unified Timetable Manage Lecture Blackouts Data Entry View All Courses View Instructors Cross-Year Constraints Outside Courses Admin Panel
System Info
  • Algorithm: CP-SAT (Google OR-Tools)
  • Time Structure: 8 AM - 4 PM, Mon-Thu
  • Time Slots: 30-minute intervals
  • Constraints: No instructor/student conflicts
  • Lab Policy: Labs can overlap